lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
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Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
OpenTitan: Open source silicon root of trust
Common SystemVerilog components
Simple single-port AXI memory interface
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
A minimal GPU design in Verilog to learn how GPUs work from the ground up
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
RISC-V Debug Support for our PULP RISC-V Cores
[UNRELEASED] FP div/sqrt unit for transprecision